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| TC74HC646AP TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC646AP Octal Bus Transceiver/Register (3-state) The TC74HC646A is high speed CMOS OCTAL BUS TRANSCEIVER/REGISTERs fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. This device is bus transceiver with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the internal registers. When the direction input (DIR) is held high, the A1 thru A8 become inputs and the B1 thru B8 become outputs. When the Weight: 1.50 g (typ.) DIR input is held low, the A1 thru A8 become output and the B1 thru B8 become inputs. The enable input G is held high, both the A Bus and B Bus become high impedance. The select inputs (SAB, SBA) can muiltiplex stored and real-time (transparent mode) data. Data on the A Bus or B Bus can be clocked into the registers on the positive going transition of either CAB or CBA clock inputs, respectively. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features (Note 1) (Note 2) * * * * * * * * High speed: fmax = 73 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 4 A (max) at Ta = 25C High noise immunity: VNIH = VNIL = 28% VCC (min) Output drive capability: 15 LSTTL loads Symmetrical output impedance: |IOH| = IOL = 6 mA (min) Balanced propagation delays: tpLH - tpHL Wide operating voltage range: VCC (opr) = 2 to 6 V Pin and function compatible with 74LS646 Note 1: Do not apply a signal to any bus terminal when it is in the out put mode. Damage may result. Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull down resistors. Pin Assignment 1 2007-10-01 TC74HC646AP IEC Logic Symbol Truth Table G DIR CAB X H X (Note) CBA X (Note) SAB X SBA X A Inputs Z X Inputs L X L H L X L H X L H Outputs X L L H X X (Note) L L H Qn L H B Inputs Z X Outputs L H L H Qn L H Inputs L H L H X L H The data on the B bus are displayed on the A bus, and are stored into the B storage flip-flops on the rising edge of CBA. The data in the B storage flip-flops are displayed on the A bus. The data on the B bus are stored into the B storage flip-flops on the rising edge of CBA, and the stored data propagate directly onto the A bus. The data on the B bus are displayed on the A bus. The data on the A bus are displayed on the B bus, and are stored into the A storage flip-flops on the rising edge of CAB. The data in the A storage flip-flops are displayed on the B bus. The data on the A bus are stored into the A storage flip-flops on the rising edge of CAB, and the stored data propagate directly onto the B bus. The data on the A bus are displayed on the B bus. Function The output functions of A and B busses are disabled. Both A and B busses are used as inputs to the internal flip-flops. Data on the bus will be stored on the rising edge of the clock. X X X X (Note) X L H X (Note) X (Note) X (Note) X (Note) X X (Note) H X H X L L (Note) X (Note) X (Note) X H X H X: Don't care Qn: The data stored into the internal flip-flops by most recent low to high transition of the clock inputs. Z: High impedance Note: The clocks are not internally gated with either G or DIR. Therefore, data on the A and/or B busses may be clocked into the storage flip-flops at any time. 2 2007-10-01 TC74HC646AP Timing Chart System Diagram 3 2007-10-01 TC74HC646AP Absolute Maximum Ratings (Note 1) Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating -0.5 to 7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 35 75 500 -65 to 150 (Note 2) Unit V V V mA mA mA mA mW C Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 2: 500 mW in the range of Ta = -40 to 65C. From Ta = 65 to 85C a derating factor of -10 mW/C shall be applied until 300 mW. Operating Ranges (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Symbol VCC VIN VOUT Topr Rating 2 to 6 0 to VCC 0 to VCC -40 to 85 0 to 1000 (VCC = 2.0 V) Input rise and fall time tr, tf 0 to 500 (VCC = 4.5 V) 0 to 400 (VCC = 6.0 V) ns Unit V V V C Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC or GND. 4 2007-10-01 TC74HC646AP Electrical Characteristics DC Characteristics Test Condition Characteristics Symbol VCC (V) 2.0 High-level input voltage VIH 4.5 6.0 2.0 Low-level input voltage VIL 4.5 6.0 2.0 High-level output voltage VIN = VIH or VIL IOH = -20 A IOH = -6 mA IOH = -7.8 mA IOL = 20 A IOL = 6 mA IOL = 7.8 mA 3-state output off-state current Input leakage current Quiescent supply current IOZ IIN ICC VIN = VIH or VIL VOUT = VCC or GND VIN = VCC or GND VIN = VCC or GND 4.5 6.0 4.5 6.0 2.0 Low-level output voltage VIN = VIH or VIL 4.5 6.0 4.5 6.0 6.0 6.0 6.0 Min 1.50 3.15 4.20 1.9 4.4 5.9 4.18 5.68 Ta = 25C Typ. 2.0 4.5 6.0 4.31 5.80 0.0 0.0 0.0 0.17 0.18 Max 0.50 1.35 1.80 0.1 0.1 0.1 0.26 0.26 0.5 0.1 4.0 Ta = -40 to 85C Min 1.50 3.15 4.20 1.9 4.4 5.9 4.13 5.63 Max 0.50 1.35 1.80 0.1 0.1 0.1 0.33 0.33 5.0 1.0 40.0 A A A V V V V Unit VOH VOL Timing Requirements (input: tr = tf = 6 ns) Characteristics Symbol Test Condition VCC (V) Minimum pulse width (CK) tW (H) tW (L) 2.0 4.5 6.0 2.0 Minimum set-up time ts 4.5 6.0 2.0 Minimum hold time th 4.5 6.0 2.0 Clock frequency f 4.5 6.0 Ta = 25C Typ. Limit 75 15 13 50 10 9 5 5 5 6 31 36 Ta = -40 to 85C Limit 95 19 16 65 13 11 5 5 5 5 25 29 MHz ns ns ns Unit 5 2007-10-01 TC74HC646AP AC Characteristics (input: tr = tf = 6 ns) Test Condition Characteristics Symbol CL (pF) 50 VCC (V) 2.0 4.5 6.0 2.0 50 Propagation delay time (BUS-bus) tpLH tpHL 150 4.5 6.0 2.0 4.5 6.0 2.0 50 Propagation delay time (CAB, CBA-bus) tpLH tpHL 150 4.5 6.0 2.0 4.5 6.0 2.0 50 Propagation delay time (SAB, SBA-bus) tpLH tpHL 150 4.5 6.0 2.0 4.5 6.0 2.0 50 Output enable time ( G , DIR-bus) tpZL tpZH RL = 1 k 150 4.5 6.0 2.0 4.5 6.0 Output disable time ( G , DIR-bus) tpLZ tpHZ 2.0 RL = 1 k 50 4.5 6.0 2.0 Maximum clock frequency Input capacitance Output capacitance Power dissipation capacitance fmax 50 4.5 6.0 CIN CI/O CPD (Note) Min 6 31 36 Ta = 25C Typ. 25 7 6 74 21 18 91 26 22 98 28 24 116 33 28 81 23 20 98 28 24 84 24 20 102 29 25 60 23 20 19 67 79 5 13 39 Max 60 12 10 150 30 26 190 38 32 210 42 36 250 50 43 170 34 29 210 42 36 175 35 30 215 43 37 175 35 30 10 Ta = -40 to 85C Min 5 25 29 Max 75 15 13 190 38 32 240 48 41 265 53 45 315 63 54 215 43 37 265 53 45 220 44 37 270 54 46 220 44 37 10 pF pF pF MHz ns ns ns ns ns ns Unit Output transition time tTLH tTHL Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPDVCCfIN + ICC/8 (per bit) 6 2007-10-01 TC74HC646AP Package Dimensions Weight: 1.50 g (typ.) 7 2007-10-01 TC74HC646AP RESTRICTIONS ON PRODUCT USE * The information contained herein is subject to change without notice. 20070701-EN GENERAL * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his document shall be made at the customer's own risk. * The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of TOSHIBA or the third parties. * Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 8 2007-10-01 |
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